External Segger J-Link™ Debug Interface
External target hardware, such as a custom PCB, can be connected to J3 for firmware programming and debug. The Segger debug interface is implemented as shown in Figure 15. J3 is implemented with a 2x5 10-pin header on 0.05” centers.
In order to enable the external J-Link connection on the Eval boards, ensure the following are implemented on the target hardware:
- EXT VTG (3.0V - 3.3V operation ONLY)
- Used by the debug interface as an input. Connect EXT VTG to the BMD-300 Series power supply (VCC) on the target hardware.
- If your target design does not operate at 3.0V-3.3V, then an external Segger J-Link interface is required to prevent damage to the target module. The Base model is sufficient.
- EXT GND DETECT
- Detect the presence of external target hardware. Connect EXT GND DETECT to GND on the target hardware in order to program the external hardware rather than the on-board module.
- EXT_SWDIO and EXT_SWCLK
- Connect to SWDIO and SWDCLK on the target BMD-300, respectively.
- EXT_SWO, EXT_RESETn (Optional)
- Connect to P0.18 and P0.21 on the target BMD-300, respectively.
Connect external power to the target hardware, then connect the BMD-300 Series Evaluation Board to USB. At this point, the debug interface will interact with the target hardware instead of the on-board BMD-300.
These may come in handy for programming:
- SWD programming cable: https://www.adafruit.com/products/1675
- SWD break-out board: https://www.adafruit.com/product/2743